HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 40

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Figure 18.12 Operation of EP3 Interrupt-In Transfer.............................................................. 463
Figure 18.13 Forcible Stall by Application............................................................................. 466
Figure 18.14 Automatic Stall by USB Function Module......................................................... 467
Figure 18.15 RDFN Bit Operation for EP1 ............................................................................ 468
Figure 18.16 PKTE Bit Operation for EP2............................................................................. 469
Figure 18.17 Example of USB Function Module External Circuitry (Internal Transceiver) ..... 471
Figure 18.18 Example of USB Function Module External Circuitry (External Transceiver) .... 472
Figure 18.19 TR Interrupt Flag Set Timing ............................................................................ 474
Section 20 I/O Ports
Figure 20.1 Port A................................................................................................................. 507
Figure 20.2 Port B................................................................................................................. 508
Figure 20.3 Port C................................................................................................................. 510
Figure 20.4 Port D................................................................................................................. 511
Figure 20.5 Port E ................................................................................................................. 513
Figure 20.6 Port F ................................................................................................................. 514
Figure 20.7 Port G................................................................................................................. 515
Figure 20.8 Port H................................................................................................................. 516
Figure 20.9 Port J.................................................................................................................. 518
Figure 20.10 Port K............................................................................................................... 519
Figure 20.11 Port L ............................................................................................................... 520
Figure 20.12 Port M .............................................................................................................. 521
Figure 20.13 Port N............................................................................................................... 523
Figure 20.14 SC Port............................................................................................................. 524
Section 21 A/D Converter
Figure 21.1 Block Diagram of A/D Converter........................................................................ 528
Figure 21.2 A/D Conversion Timing...................................................................................... 535
Figure 21.3 Definitions of A/D Conversion Accuracy ........................................................... 537
Figure 21.4 Definitions of A/D Conversion Accuracy ............................................................ 537
Figure 21.5 Analog Input Circuit Example............................................................................. 538
Figure 21.6 Example of Analog Input Protection Circuit ........................................................ 539
Figure 21.7 Analog Input Pin Equivalent Circuit.................................................................... 540
Section 22 User Break Controller
Figure 22.1 Block Diagram of User Break Controller............................................................. 542
Section 23 User Debugging Interface (UDI)
Figure 23.1 Block Diagram of UDI........................................................................................ 567
Figure 23.2 TAP Controller State Transitions ........................................................................ 578
Figure 23.3 UDI Data Transfer Timing.................................................................................. 580
Figure 23.4 UDI Reset........................................................................................................... 580
Section 25 Electrical Characteristics
Figure 25.1 Power On/Off Sequence...................................................................................... 624
Figure 25.2 EXTAL Clock Input Timing ............................................................................... 632
Rev. 2.00, 09/03, page xxxviii of xlvi

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