HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 109

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Modulo Addressing: Like other DSPs, the SH7727 has a modulo addressing mode. Address
registers are updated in the same way in this mode. When the address pointer value reaches the
preset modulo end address, the address pointer value becomes the modulo start address.
Modulo addressing is only available for the X and Y data transfer instructions (MOVX.W,
MOVY.W). Modulo addressing mode is specified for the X address register by setting the DMX
bit in the SR register, and for the Y address register by setting the DMY bit. Modulo addressing is
valid for either the X or the Y address register, only; it cannot be set for both at the same time.
Therefore, DMX and DMY cannot both be set simultaneously (if they are, the DMY setting will
be valid).
The MOD register is provided to set the start and end addresses of the modulo address area. The
MOD register contains MS (Modulo Start) and ME (Modulo End). An example of the use of the
MOD register (MS and ME fields) is shown below.
The start and end addresses are specified in MS and ME, then the DMX or DMY bit is set to 1.
The address register contents are compared with ME, and if they match, start address MS is stored
in the address register. The lower 16 bits of the address register are compared with ME.
The maximum modulo size is 64 kbytes. This is sufficient to access the X and Y data memory. A
block diagram of modulo addressing is shown in figure 2.14.
ModAddr: .DATA.W
ModStart: .DATA
ModEnd:
MOV.L ModAddr,Rn;
LDC Rn,MOD;
.DATA.W
.DATA
:
Rn=ModEnd, ModStart
ME=ModEnd, MS=ModStart
mEnd; ModEnd
mStart;
Rev.6.00 Mar. 27, 2009 Page 51 of 1036
ModStart
REJ09B0254-0600
Section 2 CPU