HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 273

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.2.9
BRCR sets the following conditions:
1. Channels A and B are used in two independent channels condition or under the sequential
2. A break is set before or after instruction execution.
3. A break is set by the number of execution times.
4. Determine whether to include data bus on channel B in comparison conditions.
5. Enable PC trace.
6. Enable the ASID check.
The break control register (BRCR) is a 32-bit read/write register that has break conditions match
flags and bits for setting a variety of break conditions.
A power-on reset initializes BRCR to H'00000000.
Bits 31 to 22—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 21—Break ASID Mask A (BASMA): Specifies whether the bits of the channel A break
ASID7 to ASID0 (BASA7 to BASA0) set in BASRA are masked or not.
Bit 21: BASMA Description
0
1
Initial value:
Initial value:
condition.
R/W:
R/W: R/W
Bit:
Bit:
Break Control Register (BRCR)
SCM
FCA
31
15
—
R
0
0
All BASRA bits are included in break condition, and ASID is checked
(Initial value)
No BASRA bits are included in break condition, and ASID is not checked
SCM
FCB
R/W
30
14
—
R
0
0
SCM
FDA
R/W
29
13
—
R
0
0
SCM
FDB
R/W
28
12
—
R
0
0
PCTE PCBA
R/W
27
11
—
R
0
0
R/W
26
10
—
R
0
0
25
—
—
R
R
0
9
0
24
—
—
R
R
0
8
0
DBEB PCBB
Rev.6.00 Mar. 27, 2009 Page 215 of 1036
R/W
23
—
R
0
7
0
R/W
22
—
R
0
6
0
Section 8 User Break Controller
BAS
R/W
MA
21
—
R
0
5
0
BAS
R/W
MB
20
—
R
0
4
0
SEQ
R/W
19
—
R
0
3
0
REJ09B0254-0600
18
—
—
R
R
0
2
0
17
—
—
R
R
0
1
0
ETBE
R/W
16
—
R
0
0
0