HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 629

MPU 3V 16K PB-FREE 240-QFP

HD6417727F160V

Manufacturer Part Number
HD6417727F160V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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19.2.3
The transmit shift register 2 (SCTSR2) transmits serial data. The SCI loads transmit data from the
transmit FIFO data register 2 (SCFTDR2) into the SCTSR2, then transmits the data serially from
the TxD2 pin, LSB (bit 0) first. After transmitting one data byte, the SCI automatically loads the
next transmit data from the SCFTDR2 into the SCTSR2 and starts transmitting again. The CPU
cannot read or write the SCTSR2 directly.
19.2.4
The transmit FIFO data register 2 (SCFTDR2) is a 16-byte 8-bit-length FIFO register that stores
data for serial transmission. When the SCIF detects that the transmit shift register (SCTSR2) is
empty, it moves transmit data written in the SCFTDR2 into the SCTSR2 and starts serial
transmission. Continuous serial transmission is performed until the transmit data in the SCFTDR2
becomes empty. The CPU can always write to the SCFTDR2.
When the transmit data in the SCFTDR2 is full (16 bytes), next data cannot be written. If
attempted to write, the data is ignored.
Transmit Shift Register 2 (SCTSR2)
Transmit FIFO Data Register 2 (SCFTDR2)
R/W:
R/W:
Bit:
Bit:
W
7
7
W
6
6
Section 19 Serial Communication Interface with FIFO (SCIF)
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Rev.6.00 Mar. 27, 2009 Page 571 of 1036
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