HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 136

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 2 CPU
Instruction
STC.L SR,@–Rn
STC.L GBR,@–Rn
STC.L VBR,@–Rn
STC.L SSR,@–Rn
STC.L SPC,@–Rn
STC.L R0_BANK,
STC.L R1_BANK,
STC.L R2_BANK,
STC.L R3_BANK,
STC.L R4_BANK,
STC.L R5_BANK,
STC.L R6_BANK,
STC.L R7_BANK,
STS
STS
STS
STS.L MACH,@–Rn
STS.L MACL,@–Rn
STS.L PR,@–Rn
TRAPA #imm
Note: * Number of states before the chip enters the sleep state.
Rev.6.00 Mar. 27, 2009 Page 78 of 1036
REJ09B0254-0600
@–Rn
@–Rn
@–Rn
@–Rn
@–Rn
@–Rn
@–Rn
@–Rn
MACH,Rn
MACL,Rn
PR,Rn
The table shows the minimum number of clocks required for execution. In practice, the
number of execution cycles will be increased if there is contention between an instruction
fetch and a data access, or if the destination register of a load instruction (memory →
register) is also used by the following instruction.
Operation
Rn–4 → Rn, SR → (Rn)
Rn–4 → Rn, GBR → (Rn)
Rn–4 → Rn, VBR → (Rn)
Rn–4 → Rn, SSR → (Rn)
Rn–4 → Rn, SPC → (Rn)
Rn–4 → Rn, R0_BANK → (Rn)
Rn–4 → Rn, R1_BANK → (Rn)
Rn–4 → Rn, R2_BANK → (Rn)
Rn–4 → Rn, R3_BANK → (Rn)
Rn–4 → Rn, R4_BANK → (Rn)
Rn–4 → Rn, R5_BANK → (Rn)
Rn–4 → Rn, R6_BANK → (Rn)
Rn–4 → Rn, R7_BANK → (Rn)
MACH → Rn
MACL → Rn
PR → Rn
Rn–4 → Rn, MACH → (Rn)
Rn–4 → Rn, MACL → (Rn)
Rn–4 → Rn, PR → (Rn)
PC → SPC, SR → SSR,
imm << 2 → TRA,
VBR + H'0100 → PC
Code
0100nnnn00000011
0100nnnn00010011
0100nnnn00100011
0100nnnn00110011
0100nnnn01000011
0100nnnn10000011
0100nnnn10010011
0100nnnn10100011
0100nnnn10110011
0100nnnn11000011
0100nnnn11010011
0100nnnn11100011
0100nnnn11110011
0000nnnn00001010
0000nnnn00011010
0000nnnn00101010
0100nnnn00000010
0100nnnn00010010
0100nnnn00100010
11000011iiiiiiii
Privileged
Mode
√
—
√
√
√
√
√
√
√
√
√
√
√
—
—
—
—
—
—
—
Cycles T Bit
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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