HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 66

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview and Pin Functions
1.2
Rev.6.00 Mar. 27, 2009 Page 8 of 1036
REJ09B0254-0600
Bus state
controller
controller
(LBSC)
(BSC)
Li bus
state
CPU core
Block Diagram
SuperH
512-byte
SRAM
Cache access
Real time
controller
(RTC)
(CCN)
clock
Peripheral bus 2 (P2 bus)
Internal bus (I bus)
line buffer
2.4-kbyte
front end
interface
(AFEIF)
Analog
SRAM
instruction/data
Internal SRAM
Peripheral bus (P bus)
for CPU/DSP
(XY RAM)
16 kbytes
controller
smart card
(UBC)
LI bus
break
User
Serial/
(SCI)
Figure 1.1 Block Diagram
128-byte
SRAM
memory access
controller
(DMAC)
LCD display
Direct
controller
(TMU)
(LCDC)
Timer
DSP core
interface
CODEC
Peripheral bus
(SIOF)
Audio
controller
controller
Interrupt
(INTC)
pallet SRAM
management
512-byte
Memory
(MMU)
communication
controller
CPU bus (L bus)
PC card
unit
(PCC)
interface
(SCIF)
Serial
interface
Peripheral bus 1 (P1 bus)
(H-UDI)
debug
Internal bus 2 (I2 bus)
User
controller
function
(USBF)
Cache memory
USB host controller
USB
converter
16 kbytes
(ADC)
A/D
(USBH)
generator
(CPG)
Clock
pulse
converter
288-byte
SRAM
(DAC)
D/A