HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 292

MPU 3V 16K PB-FREE 240-QFP

HD6417727F160V

Manufacturer Part Number
HD6417727F160V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 9 Power-Down Modes and Software Reset
Table 9.1
Mode
Sleep
mode
Standby
mode
Module
standby
function
Hardware
standby
mode
Notes: 1. The RTC runs if the START bit in RCR2 is set to 1 (see section 16, Realtime Clock
Rev.6.00 Mar. 27, 2009 Page 234 of 1036
REJ09B0254-0600
2. Depends on the on-chip supporting module.
3. The RTC runs if the START bit in RCR2 is set to 1. TMU does not run.
4. USB and LCDC must be stopped before entering standby mode.
5.
6.
7.
Transition
Conditions
Execute
SLEEP
instruction
with STBY bit
cleared to 0
in STBCR *
Execute
SLEEP
instruction
with STBY bit
set to 1 in
STBCR *
Set MSTP bit
of STBCR
to 1 *
Drive CA pin
low
TMU external pin: Held
SCI external pin: Reset
1) To stop LCDC, set 0 to DON bit.
2) To stop the USB Host Controller, set USBRESET bit in the HcControl register.
(RTC)). TMU runs when output of the RTC is used as input to its counter (see section
15, Timer (TMU)).
For LCDC, refer to the LPS bit in LDPMMR to confirm that power-off sequence has
been completed before entering standby-mode.
When putting the RTC into module standby mode, first access one or more of registers
RTC, SCI, and TMU. Then put the RTC into module standby mode.
Do not cause the CPU to transition to sleep mode, or cancel sleep mode, during a
transmit or receive operation in which the USB function controller or SIOF uses DMA.
Power-Down Modes
6
4
*
5
7
CPG CPU
Runs Halts
Halts Halts
Runs Runs
Halts Halts
or
halts
CPU
Register
Held
Held
Held
Held
On-Chip
Memory
Held
Held
Held
Held
State
On-Chip
Supporting
Modules
Run
Halt *
Specified
module halts
Halt *
1
3
Held
Pins
Held
*
Held
2
External
Memory
Refresh
Self-
refresh
Refresh
Self-
refresh
Canceling
Procedure
1. Interrupt
2. Reset
1. Interrupt
2. Reset
1. Clear
2. Reset
Power-on
reset
MSTP bit
to 0

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