HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 14
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
20 000
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Rev. 5.00 May 29, 2006 page xii of xlviii
Item
8.4.6 PCMCIA
Control Register (PCR)
Table 8.10 Area 6
Wait Control (PCMCIA
I/F)
8.5.4 Synchronous
DRAM Interface
Figure 8.24 Auto-
Refresh Operation
Page
192
222
229
Revision (See Manual for Details)
Table title amended
Description added
If an external bus access request (in order to perform 2) below
conflicts with an auto-refresh request, self-refresh request, or
bus release request internal to the LSI under the following
conditions, SDRAM all-bank precharge may not be executed
properly in the first cycle of the refresh or bus release cycle. In
this case, precharging of the selected bank is executed instead
of all-bank precharge.
1. The RASD bit in the individual memory control register
(MCR) is set to 1
and
2. long-word access is performed to any 16-bit bus width area
(areas 0 to 6) or word/long-word access is performed to any 8-
bit bus width area (areas 0 to 6).
The problem may be avoided by either of the following
measures.
1. Use the auto-precharge mode.
2. Use 32-bit bus width for all areas.
Figure amended
H'00000000
RTCOR
RTCNT value
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