HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 246
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Section 8 Bus State Controller (BSC)
8.4.9
RTCNT is a 16-bit read/write register. RTCNT is an 8-bit counter that counts up with input
clocks. The clock select bits (CKS2 to CKS0) of RTCSR select the input clock. When RTCNT
matches RTCOR, the CMF bit of RTCSR is set and RTCNT is cleared. RTCNT is initialized to
H'00 by a power-on reset; it continues incrementing after a manual reset; it is not initialized by
standby mode and holds its values unchanged.
Note: Writing to the RTCNT differs from that to general registers to ensure the RTCNT is not
8.4.10
The refresh time constant register (RTCOR) is a 16-bit read/write register. The values of RTCOR
and RTCNT (bottom 8 bits) are constantly compared. When the values match, the CMF of
RTCSR is set and RTCNT is cleared to 0. When the refresh bit (RFSH) of the individual memory
control register (MCR) is set to 1 and the refresh mode is set to auto refresh, a memory refresh
cycle occurs when the CMF bit is set. RTCOR is initialized to H'00 by a power-on reset. It is not
initialized by a manual reset or standby mode, but holds its contents. Make the RTCOR setting
before setting bits CKS2 to CKS0 in RTCSR.
Note: Writing to the RTCOR differs from that to general registers to ensure the RTCOR is not
Rev. 5.00 May 29, 2006 page 196 of 698
REJ09B0146-0500
Bit
15 to 8
7 to 0
Bit
15 to 8
7 to 0
rewritten incorrectly. Use the word-transfer instruction to set the upper byte as
B'10100101 and the lower byte as the write data. For the byte-transfer instruction, writing
is disabled. Read data in 16 bits. 0 is read from undefined bits.
rewritten incorrectly. Use the word-transfer instruction to set the upper byte as
B'10100101 and the lower byte as the write data. For the byte-transfer instruction, writing
is disabled. Read data in 16 bits. 0 is read from undefined bits.
Refresh Timer Counter (RTCNT)
Refresh Time Constant Register (RTCOR)
Bit Name
—
—
Bit Name
—
—
Initial Value
All 0
All 0
Initial Value
All 0
All 0
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 0.
8-bit counter
Description
Reserved
These bits are always read as 0.
Upper limit of the counter (8 bits)
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