HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 89

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 2.7 lists the logic operation instructions.
Table 2.7
Note:
Instruction
AND
AND
AND.B #imm,@(R0,GBR)
NOT
OR
OR
OR.B
TAS.B @Rn*
TST
TST
TST.B #imm,@(R0,GBR)
XOR
XOR
XOR.B #imm,@(R0,GBR)
Rm,Rn
#imm,R0
Rm,Rn
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
Rm,Rn
#imm,R0
Rm,Rn
#imm,R0
* The on-chip DMAC's bus cycle is not inserted between the read and write cycles of the
TAS instruction. The bus authority is not released by the BREQ.
Logic Operation Instructions
Operation
Rn & Rm
R0 & imm
(R0 + GBR) & imm
(R0 + GBR)
~Rm
Rn | Rm
R0 | imm
(R0 + GBR) | imm
(R0 + GBR)
If (Rn) is 0, 1
1
Rn & Rm; if the result
is 0, 1
R0 & imm; if the result
is 0, 1
(R0 + GBR) & imm;
if the result is 0, 1
Rn ^ Rm
R0 ^ imm
(R0 + GBR) ^ imm
(R0 + GBR)
MSB of (Rn)*
Rn
T
T
Rn
Rn
R0
Rn
R0
R0
T;
T
Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
0110nnnnmmmm0111
0010nnnnmmmm1011
11001011iiiiiiii
11001111iiiiiiii
0100nnnn00011011
0010nnnnmmmm1000
11001000iiiiiiii
11001100iiiiiiii
0010nnnnmmmm1010
11001010iiiiiiii
11001110iiiiiiii
Rev. 5.00 May 29, 2006 page 39 of 698
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REJ09B0146-0500
Section 2 CPU
Cycles T Bit
1
1
3
1
1
1
3
4
1
1
3
1
1
3
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Test
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