HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 361
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Manufacturer
Quantity
Price
Part Number:
HD6417706F133
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD6417706F133V
Manufacturer:
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Quantity:
2 000
Company:
Part Number:
HD6417706F133V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417706F133V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Note: Take enough care because the positions of the bits are not continuous.
Bit
14
3
2
13
1
0
12 to 9,
7, 6
8
Bit Name
IFC2
IFC1
IFC0
PFC2
PFC1
PFC0
—
—
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Description
CPU Clock Frequency Division Ratio
These bits specify the frequency division ratio
(Divider 1) of the CPU clock with respect to the
output frequency of PLL circuit 1.
000:
001:
100:
010:
Other than the above: Reserved (Setting prohibited)
Note: Do not set the CPU clock frequency lower
Peripheral Clock Frequency Division Ratio
These bits specify the division ratio (Divider 2)of the
peripheral clock frequency with respect to the
frequency of the output frequency of PLL circuit 1 or
the frequency of the CKIO pin.
000:
001:
100:
010:
101:
Other than the above: Reserved (Setting prohibited)
Note: Do not set the peripheral clock frequency
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
1
1/2
1/3
1/4
1
1/2
1/3
1/4
1/6
than the CKIO frequency.
higher than the frequency of the CKIO pin.
Section 10 Clock Pulse Generator (CPG)
Rev. 5.00 May 29, 2006 page 311 of 698
REJ09B0146-0500
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