HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 475
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Manufacturer:
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15.3.2
In the smart card interface mode, the function of bit 4 in SCSSR of the SCI is changed as shown
blow. Relating to this, the setting conditions for bit 2, the TEND bit, are also changed.
Bit
7
6
5
4
Bit Name
TDRE
RDRF
ORER
ERS
Serial Status Register (SCSSR)
Initial Value
1
0
0
0
R/W
R/(W) *
R/(W) *
R/(W) *
R/(W) * Error Signal Status
Description
Transmit Data Register Empty
Receive Register Full
Overrun Error
These bits have the same function as in the ordinary
SCI. See section 14, Serial Communication Interface
(SCI), for more information.
In the smart card interface mode, bit 4 indicates the
state of the error signal returned from the receiving
side during transmission. The smart card interface
cannot detect framing errors.
0: Receiving ended normally with no error signal.
1: An error signal indicating a parity error was
Note: The ERS flag maintains its state even when
[Clearing conditions]
1. The chip is reset or enters standby mode.
2. ERS is read as 1, then written to with 0.
transmitted from the receiving side.
[Setting condition]
The error signal sampled is low.
the TE bit in SCSCR is cleared to 0.
Rev. 5.00 May 29, 2006 page 425 of 698
Section 15 Smart Card Interface
REJ09B0146-0500
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