HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 238

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 8 Bus State Controller (BSC)
Rev. 5.00 May 29, 2006 page 188 of 698
REJ09B0146-0500
Bit
6
5
4
3
Bit Name
AMX3
AMX2
AMX1
AMX0
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Address Multiplex
The AMX bits specify address multiplexing for
synchronous DRAM. The actual address shift value
differs between DRAM interface and synchronous
DRAM interface.
For Synchronous DRAM interface:
0000: Reserved (Setting prohibited)
0001: Reserved (Setting prohibited)
0010: Reserved (Setting prohibited)
0011: Reserved (Setting prohibited)
0100: The row address begins with A9. (The A9
0101: The row address begins with A10. (The A10
0110: Cannot be set.
0111: The row address begins with A9. (The A9
1000: Reserved (Setting prohibited)
1001: Reserved (Setting prohibited)
1010: Reserved (Setting prohibited)
1011: Reserved (Setting prohibited)
1100: Reserved (Setting prohibited)
1101: The row address begins with A10. (The A10
1110: The row address begins with A11. (The A11
1111: Reserved (Setting prohibited)
Notes: 1. Cannot be set when using a 32-bit bus
value is output at A1 when the row address is
output. 64 M (1 M
value is output at A1 when the row address is
output. 128 M (2 M
(2 M
value is output at A1 when the row address is
output. 64 M (512 k
value is output at A1 when the row address is
output. 256 M (4 M
value is output at A1 when the row address is
output. 512 M (8 M
2. Cannot be set when using a 16-bit bus
width.
width.
8 bits
4 banks))
16 bits
16 bits
16 bits
16 bits
32 bits
4 banks))
4 banks), 64 M
4 banks))
4 banks) *
4 banks) *
1
2
)
)