HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 510
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
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Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.8
The bit rate register 2 (SCBRR2) is an eight-bit register that, together with the baud rate generator
clock source selected by the CKS1 and CKS0 bits in the SCSMR2, determines the serial
transmit/receive bit rate.
The CPU can always read and write the SCBRR2. The SCBRR2 is initialized to H'FF by a reset or
in module standby or standby mode. Each channel has independent baud rate generator control, so
different values can be set in two channels.
The SCBRR2 setting is calculated as follows:
Table 16.2 SCSMR2 Settings
n
0
1
2
3
Note: Find the bit rate error by the following formula:
Rev. 5.00 May 29, 2006 page 460 of 698
REJ09B0146-0500
B:
N:
P : Operating frequency for peripheral modules (MHz)
n:
Error (%) =
Asynchronous mode: N =
Bit Rate Register 2 (SCBRR2)
Bit rate (bit/s)
SCBRR2 setting for baud rate generator (0
Baud rate generator clock source (n
n, see table 16.2.)
(N+1) × 64 × 2
Clock Source
P
P /4
P /16
P /64
P × 10
64
2n
6
–
1
2
× B
P
2n – 1
– 1
CKS1
0
0
1
1
B
0, 1, 2, 3) (for the clock sources and values of
× 100
10
N
6
– 1
255)
SCSMR2 Settings
CKS0
0
1
0
1
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