HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 269

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Tc1, Tc2, and Tc3 cycles, and a WRITA command that performs auto-precharge is issued in the
Tc4 cycle. In the write cycle, the write data is output at the same time as the write command. In
case of the write with auto-precharge command, precharging of the relevant bank is performed in
the synchronous DRAM after completion of the write command, and therefore no command can
be issued for the same bank until precharging is completed. Consequently, in addition to the
precharge wait cycle, Tpc, used in a read access, cycle Trwl is also added as a wait interval until
precharging is started following the write command. Issuance of a new command for the same
bank is postponed during this interval. The number of Trwl cycles can be specified by the TRWL
bit in MCR.
CKIO
Address
upper bits
A12 or A11 *
Address
lower bits *
CSn
RD/WR
RASx
CASx
DQMxx
D31 to D0
(read)
BS
Notes: 1.
Figure 8.16 Basic Timing for Synchronous DRAM Burst Write
2.
2
Command bit
Column address
1
Tr
Tc1
Tc2
Tc3
Rev. 5.00 May 29, 2006 page 219 of 698
Section 8 Bus State Controller (BSC)
Tc4
(Trw1)
REJ09B0146-0500
(Tpc)