EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 180

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

PLLs in Stratix III Devices
6–30
Stratix III Device Handbook, Volume 1
clkswitch
areset
pfdena
scanclk
scandata
scanclkena
configupdate
phasecounter
select[3:0]
phaseupdown
phasestep
Table 6–12. PLL Input Signals (Part 2 of 2)
Port
Switchover signal used to initiate
clock switchover asynchronously.
When used in manual switchover,
clkswitch
signal between
inclk1
inclk0
versa.
Signal used to reset the PLL which
resynchronizes all the counter
outputs. Active high
Enables the outputs from the
phase frequency detector. Active
high
Serial clock signal for the real-time
PLL reconfiguration feature.
Serial input data stream for the
real-time PLL reconfiguration
feature.
Enables
scandata
scan chain. Active high
Writes the data in the scan chain to
the PLL. Active high
Selects corresponding PLL counter
for dynamic phase shift
Selects dynamic phase shift
direction; 1 = UP; 0 = DOWN
Logic high enables dynamic phase
shifting
.
scanclk
is selected and vice
If
Description
to be loaded in the
clkswitch = 0,
is used as a select
inclk0
and allows the
and
Logic array or I/O pin
Logic array
Logic array
Logic array
Logic array
Logic array or I/O pin
Logic array or I/O pins
Logic array or I/O pins
Logic array or I/O pin
Logic array or I/O pin
Source
Clock switchover circuit
General PLL control signal
PFD
Reconfiguration circuit
Reconfiguration circuit
PLL reconfiguration circuit
PLL reconfiguration circuit
PLL reconfiguration circuit
PLL reconfiguration circuit
PLL reconfiguration circuit
Destination
Altera Corporation
November 2007