EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 398

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Passive Serial Configuration
11–38
Stratix III Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
t
t
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
CF2CD
CF2ST0
CFG
STATUS
CF2ST1
CF2CK
ST2CK
DSU
DH
CH
CL
CLK
MAX
R
CD2UM
CD2CU
CD2UMC
Table 11–10. PS Timing Parameters for Stratix III Devices
Symbol
This information is preliminary.
This value is applicable if you do not delay configuration by extending the nCONFIG or nSTATUS low pulse width.
The minimum and maximum numbers apply only if you choose the internal oscillator as the clock source for starting
the device.
Table
nCONFIG
nCONFIG
nCONFIG
nSTATUS
nCONFIG
nCONFIG
nSTATUS
Data setup time before rising edge on
Data hold time after rising edge on
DCLK
DCLK
DCLK
DCLK
Input rise time
Input fall time
CONF_DONE
CONF_DONE
CONF_DONE
CLKUSR
11–10:
f
high time
low time
period
frequency
option on
low to
low to
low pulse width
low pulse width
high to
high to first rising edge on
high to first rising edge of
high to user mode
high to
high to user mode with
Parameter
Table 11–10
configuration.
Device configuration options and how to create configuration files are
discussed further in the
File
CONF_DONE
nSTATUS
nSTATUS
CLKUSR
Formats chapters in volume 2 of the Configuration Handbook.
low
high
enabled
defines the timing parameters for Stratix III devices for PS
low
(3)
DCLK
DCLK
DCLK
DCLK
Device Configuration Options
t
CLKUSR
CD2CU
4 × maximum
DCLK
Note (1)
Minimum
100
+ (4,436 ×
10
10
20
—
—
—
—
—
—
2
2
5
0
4
4
period
period)
Maximum
100
100
800
800
100
100
40
40
—
—
—
—
—
—
—
—
—
—
(2)
(2)
and
Altera Corporation
Configuration
November 2007
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
—
μs
μs
μs
μs
μs
μs