EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 369
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Altera Corporation
November 2007
f
V
Stratix III devices offer a new power supply, V
configuration pins and dual function pins. Configuration voltage
supported is 1.8 V, 2.5 V, 3.0 V, and 3.3 V. Stratix III devices do not
support 1.5 V configuration.
Use this pin to power all dedicated configuration inputs, dedicated
configuration outputs, dedicated configuration bidirectional pins, and
some of the dual functional pins that you use for configuration. With
V
with the regular I/O buffer in Stratix III devices.
The operating voltage for the configuration input pin is independent of
the I/O banks power supply V
no configuration voltage constraints on V
devices.
V
Stratix III devices have a dedicated programming power supply, V
which must be connected to 3.3 V/3.0 V/2.5 V in order to power the I/O
pre-drivers, the JTAG input and output pins (TCK, TMS, TDI, TDO and
TRST), and the design security circuitry.
1
For more information on the configuration pins power supply, refer to
“Device Configuration Pins” on page
CCPGM
CCPD
CCPGM
Pins
, configuration input buffers do not have to share power lines
Pins
V
voltage level within 100 ms. If these supplies are not ramped up
within this specified time, your Stratix III device will not
configure successfully. If your system does not allow ramp-up
time of 100 ms or less, you must hold nCONFIG low until all
power supplies are stable.
CCPGM
and V
CCPD
must ramp-up from 0 V to the desired
CCIO
during the configuration. Therefore,
Stratix III Device Handbook, Volume 1
11–50.
CCIO
Configuring Stratix III Devices
CCPGM
are needed in Stratix III
, for all the dedicated
CCPD
11–9
,
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