EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 86

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Memory Modes
4–12
Stratix III Device Handbook, Volume 1
8K×1
4K×2
2K×4
1K×8
512×16
256×32
1K×9
512×18
256×36
Table 4–5. Stratix III M9K Block Mixed-Width Configurations (Simple Dual-Port Mode)
Read Port
8K
v
v
v
v
v
v
—
—
—
×
1
Simple Dual-Port Mode
All TriMatrix memory blocks support simple dual-port mode. Simple
dual-port mode allows you to perform one-read and one-write operation
to different locations at the same time.
dual-port configuration.
Figure 4–9. Stratix III Simple Dual-Port Memory
Note to
(1)
Simple dual-port mode supports different read and write data widths
(mixed width support).
for the M9K blocks in simple dual-port mode. MLABs do not have native
support for mixed width operation. The Quartus II software can
implement mixed width memories in MLABs by using more than one
MLAB.
4K
v
v
v
v
v
v
—
—
—
×
Simple dual-port RAM supports input/output clock mode in addition to the
read/write clock mode shown.
2
Figure
2K
v
v
v
v
v
v
—
—
—
×
4
4–9:
1K
v
v
v
v
v
v
—
—
—
×
data[ ]
wraddress[ ]
wren
byteena[]
wr_addressstall
wrclock
wrclocken
aclr
8
Table 4–5
512
Write Port
v
v
v
v
v
v
—
—
—
×
16
shows the mixed width configurations
256
v
v
v
v
v
v
—
—
—
Figure 4–9
×
rd_addressstall
32
rdaddress[ ]
ecc_status
rdclocken
Note (1)
1K
rdclock
v
v
v
—
—
—
—
—
—
×
rden
9
shows the simple
q[ ]
512
Altera Corporation
—
—
—
—
—
—
v
v
v
×
November 2007
18
256
v
v
v
—
—
—
—
—
—
×
36