EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 531

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
f
t
TSD_INCLK
DUTY_TSD_INCLK
Table 1–23. Stratix III Temperature Sensing Diode Specifications - Preliminary
Symbol
TSD Input Clock Frequency
TSD Input Clock Frequency
Duty Cycle of TSD Input
(without CLK divider)
(with CLK divider)
Parameter
Table 1–22
devices. Refer to figure for “HIGH-SPEED I/O Block” in
JTAG timing requirements.
Stratix III Temperature Sensing Diode Specifications
Table 1–23
diode
Clock
Note to
(1)
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPSU
JPH
JPCO
JPZX
JPXZ
Table 1–22. Stratix III JTAG Timing Parameters and Values - Preliminary
Symbol
A 1 ns adder is required for each V
For example, t
or 13 ns if it equals 1.8 V.
(TMS) JTAG port setup time for TMS
(TDI)
.
Table
shows the JTAG timing parameters and values for Stratix III
lists the specifications for the Stratix III temperature sensing
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time for TDI
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to
valid output
JTAG port valid output to high
impedance
1–22:
Stratix III Device Datasheet: DC and Switching Characteristics
JPCO
= 12 ns if V
Parameter
0.25
Min
38
45
CCIO
of the TDO I/O bank = 2.5 V,
CCIO
Stratix III Device Handbook, Volume 2
voltage step down from 3.3 V.
Max
1.01
42
55
Min
30
14
14
—
—
—
1
3
5
11
14
14
Max
—
—
—
—
—
—
Table 1–206
(1)
(1)
(1)
MHz
MHz
Unit
%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
1–19
for