EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 292
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Stratix III External Memory Interface Features
Figure 8–10. DQS and CQn Pins and DQS Phase-Shift Circuitry
Notes to
(1)
(2)
8–22
Stratix III Device Handbook, Volume 1
DQS
CQn
DQS
CQn
Pin
Pin
Pin
Pin
Refer to the
Each DQS/CQn pin can be configured with a phase shift based on one of two possible DLL output settings.
Figure
Δt
Δt
Δt
Δt
8–10:
“DLL”
Phase-Shift
Phase-Shift
Reference
Reference
Circuitry
Circuitry
Clock (2)
Clock (2)
DQS
IOE
IOE
DQS
IOE
IOE
DLL
DLL
to
to
to
to
section on
to IOE
CQn
Pin
Δt
page 8–23
to IOE
DQS
Pin
Δt
to IOE
DQS
Pin
Δt
for possible reference input clock pins for each DLL.
to IOE
CQn
Pin
Δt
DQS Logic
Blocks
to IOE
CQn
Pin
Δt
to IOE
DQS
Pin
Δt
Note (1)
to IOE
DQS
Pin
Δt
to IOE
CQn
Pin
Δt
Phase-Shift
Phase-Shift
Reference
Reference
Clock (2)
Clock (2)
Circuitry
Circuitry
DQS
DQS
DLL
DLL
IOE
IOE
IOE
IOE
to
to
to
to
Altera Corporation
November 2007
DQS Logic
Blocks
Δt
Δt
Δt
Δt
DQS
DQS
CQn
Pin
CQn
Pin
Pin
Pin
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