EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 239

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EP3SL150F780I3N

Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet

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Altera Corporation
November 2007
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Bus Hold
Each Stratix III device I/O pin provides an optional bus-hold feature. The
bus-hold circuitry can weakly hold the signal on an I/O pin at its
last-driven state. Because the bus-hold feature holds the last-driven state
of the pin until the next input signal is present, you do not need an
external pull-up or pull-down resistor to hold a signal level when the bus
is tri-stated.
The bus-hold circuitry also pulls non-driven pins away from the input
threshold voltage where noise can cause unintended high-frequency
switching. You can select this feature individually for each I/O pin. The
bus-hold output drives no higher than V
signals. If the bus-hold feature is enabled, the programmable pull-up
option cannot be used. Disable the bus-hold feature if the I/O pin is
configured for differential signals.
The bus-hold circuitry uses a resistor with a nominal resistance (R
approximately 7 kΩ to weakly pull the signal level to the last-driven
state.
See the
volume 2 of the Stratix III Device Handbook for the specific sustaining
current driven through this resistor and the overdrive current used to
identify the next-driven input level. This information is provided for
each V
The bus-hold circuitry is active only after configuration. When going into
user mode, the bus-hold circuit captures the value on the pin present at
the end of configuration.
Programmable Pull-Up Resistor
Each Stratix III device I/O pin provides an optional programmable
pull-up resistor during user mode. If you enable this feature for an I/O
pin, the pull-up resistor (typically 25 kΩ) weakly holds the I/O to the
V
Programmable pull-up resistors are only supported on user I/O pins and
are not supported on dedicated configuration pins, JTAG pins, or
dedicated clock pins. If the programmable pull-up option is enabled, you
cannot use the bus-hold feature.
CCIO
level.
CCIO
DC and Switching Characteristics of Stratix III Devices
voltage level.
Stratix III Device Handbook, Volume 1
CCIO
Stratix III Device I/O Features
to prevent over-driving
chapter in
BH
7–21
) of

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