EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 75

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EP3SL150F780I3N

Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet

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Introduction
Overview
Altera Corporation
November 2007
SIII51004-1.3
TriMatrix
embedded SRAM to efficiently address the needs of Stratix
designs. TriMatrix memory includes 640-bit memory logic array blocks
(MLABs), 9-Kbit M9K blocks, and 144-Kbit M144K blocks. The MLABs
have been optimized to implement filter delay lines, small first-in
first-out (FIFO) buffers, and shift registers. You can use the M9K blocks
for general purpose memory applications, and the M144K blocks are
ideal for processor code storage, packet buffering, and video frame
buffering.
You can independently configure each embedded memory block to be a
single- or dual-port RAM, FIFO, ROM, or shift register via the Quartus
MegaWizard. You can stitch together multiple blocks of the same type to
produce larger memories with minimal timing penalty. TriMatrix
memory provides up to 20,491 Kbits of embedded SRAM at up to
600 MHz operation. This chapter describes TriMatrix memory blocks,
modes, features, and design considerations.
Table 4–1
TriMatrix memory.
Maximum performance
Total RAM bits
(including parity bits)
Configurations
(depth × width)
Parity bits
Byte enable
Table 4–1. Summary of TriMatrix Memory Features (Part 1 of 2)
Feature
TM
summarizes the features supported by the three sizes of
embedded memory blocks provide three different sizes of
Memory Blocks in Stratix III
600 MHz
4. TriMatrix Embedded
MLABs
64×10
32×16
32×18
32×20
64×8
64×9
640
v
v
M9K Blocks
600 MHz
512×16
512×18
256×32
256×36
9,216
8K×1
4K×2
2K×4
1K×8
1K×9
v
v
Devices
®
M144K Blocks
III FPGA
600 MHz
147,456
16K×8
16K×9
8K×16
8K×18
4K×32
4K×36
2K×64
2K×72
v
v
®
4–1
II

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