NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 158

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NH82801DB S L8DE

Manufacturer Part Number
NH82801DB S L8DE
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801DB S L8DE

Lead Free Status / RoHS Status
Compliant
Functional Description
158
Table 5-50. Alert on LAN* Message Data
Once the system transitions to the non-S0 state, it may send a single alert with an incremental
SEQUENCE number.
Table 5-50
Cover Tamper Status
Temp Event Status
Processor Missing Event Status
TCO Timer Event Status
Software Event Status
Unprogrammed FWH Event Status
GPIO Status
SEQ[3:0]
System Power State
MESSAGE1
MESSAGE2
WDSTATUS
2. WARNING: It is important that the BIOS clears the SECOND_TO_STS bit, as the alerts will
3. A system that has locked up and can not be restarted with power button press is assumed to
4. A spurious alert could occur in the following sequence:
5. An inaccurate alert message can be generated in the following scenario.
interfere with the LAN device driver from working properly. The alerts reset part of the D110
and would prevent an operating system’s device driver from sending or receiving some
messages.
have broken hardware (bad power supply, short circuit on some bus, etc.), and is beyond
ICH4’s recovery mechanisms.
— The processor has initiated an alert using the SEND_NOW bit.
— During the alert, the THRM#, INTRUDER# or GPI[11] changes state.
— The system then goes to a non-S0 state.
— The system successfully boots after a second watchdog Timeout occurs.
— PWROK goes low (typically, due to a reset button press) or a power button override
— An alert message indicating that the processor is missing or locked up is generated with a
occurs (before the SECOND_TO_STS bit is cleared).
new sequence number.
shows the data included in the Alert on LAN messages.
Field
1 = This bit will be set if the intruder detect bit is set (INTRD_DET).
1 = This bit will be set if the ICH4THERM# input signal is asserted.
1 = This bit will be set if the processor failed to fetch the first instruction.
1 = This bit is set when the TCO timer expires.
1 = This bit is set when software writes a 1 to the SEND_NOW bit.
1 = First BIOS fetch returned a value of FFh, indicating that the FWH has
not yet been programmed (still erased).
1 = This bit is set when GPIO[11] signal is high.
0 = This bit is cleared when GPIO[11] signal is low.
An event message is triggered on an transition of GPIO[11].
This is a sequence number. It is initially 0, and increments each time the
Intel
number rolls over to 0000. MSB (SEQ3) sent first.
00 = G0, 01 = G1, 10 = G2, 11 = Pre-Boot. MSB sent first
Will be the same as the MESSAGE1 Register. MSB sent first.
Will be the same as the MESSAGE2 Register. MSB sent first.
Will be the same as the WDSTATUS Register. MSB sent first.
®
ICH4 sends a new message. Upon reaching 1111, the sequence
Comment
Intel
®
82801DB ICH4 Datasheet

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