NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 20

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NH82801DB S L8DE

Manufacturer Part Number
NH82801DB S L8DE
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801DB S L8DE

Lead Free Status / RoHS Status
Compliant
Tables
20
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
3-1
3-2
3-3
3-4
3-5
4-1
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
Industry Specifications................................................................................... 27
PCI Devices and Functions ........................................................................... 30
Hub Interface Signals .................................................................................... 39
LAN Connect Interface Signals...................................................................... 39
EEPROM Interface Signals ........................................................................... 40
Firmware Hub Interface Signals .................................................................... 40
PCI Interface Signals ..................................................................................... 40
IDE Interface Signals ..................................................................................... 43
LPC Interface Signals .................................................................................... 44
Interrupt Signals............................................................................................. 44
USB Interface Signals.................................................................................... 45
Power Management Interface Signals........................................................... 46
Processor Interface Signals........................................................................... 47
SM Bus Interface Signals .............................................................................. 48
System Management Interface Signals ......................................................... 48
Real Time Clock Interface ............................................................................. 49
Other Clocks .................................................................................................. 49
Miscellaneous Signals ................................................................................... 49
AC-Link Signals ............................................................................................. 50
General Purpose I/O Signals ......................................................................... 51
Power and Ground Signals............................................................................ 52
Functional Strap Definitions........................................................................... 53
Test Mode Selection ...................................................................................... 55
Intel
Integrated Pull-Up and Pull-Down Resistors ................................................. 58
IDE Series Termination Resistors.................................................................. 58
Power Plane and States for Output and I/O Signal ....................................... 59
Power Plane for Input Signals ....................................................................... 63
Intel
Type 0 Configuration Cycle Device Number Translation............................... 71
LPC Cycle Types Supported ......................................................................... 87
Start Field Bit Definitions ............................................................................... 87
Cycle Type Bit Definitions.............................................................................. 88
Transfer Size Bit Definition ............................................................................ 88
SYNC Bit Definition........................................................................................ 88
Intel
DMA Transfer Size ........................................................................................ 94
Address Shifting in 16-bit I/O DMA Transfers................................................ 94
DMA Cycle vs. I/O Address ........................................................................... 98
PCI Data Bus vs. DMA I/O Port Size ............................................................. 98
DMA I/O Cycle Width vs. BE[3:0]# ................................................................ 98
Counter Operating Modes ........................................................................... 104
Interrupt Controller Core Connections ......................................................... 106
Interrupt Status Registers ............................................................................ 107
Content of Interrupt Vector Byte .................................................................. 107
APIC Interrupt Mapping ............................................................................... 113
Arbitration Cycles......................................................................................... 115
APIC Message Formats............................................................................... 115
EOI Message ............................................................................................... 116
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ICH4 System Power Planes................................................................. 57
ICH4 and System Clock Domains........................................................ 65
ICH4 Response to Sync Failures......................................................... 89
Intel
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82801DB ICH4 Datasheet

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