NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 378

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

LPC Interface Bridge Registers (D31:F0)
9.10
9.10.1
378
Table 9-12. Registers to Control GPIO
General Purpose I/O Registers (D31:F0)
The control for the general purpose I/O signals is handled through a separate 64-byte I/O space.
The base offset for this space is selected by the GPIO_BAR register.
Register I/O address map.
GPIO_USE_SEL—GPIO Use Select Register
Offset Address:
Default Value:
Lockable:
General Registers
Output Control Registers
Input Control Registers
21,11,
0C–0Fh
1C–1Fh
2C–2Fh
08–0Bh
18–1Bh
20–2Bh
38–3Bh
00–03h
04–07h
10–13h
14–17h
30–33h
34–37h
Offset
Bit
5:0
GPIO_USE_SEL — R/W. Each bit in this register enables the corresponding GPIO (if it exists) to be
used as a GPIO, rather than for the native function.
0 = Signal used as native function.
1 = Signal used as a GPIO.
NOTES:
1. Bits 31:29, 26, 15:14, and 10:9 are not implemented because there is no corresponding GPIO.
GPIO_USE_SEL2 GPIO Use Select
GPIO_USE_SEL
Bits 28:27, 25:22, 20:18, 13:12, and 8:6 are not implemented because the corresponding GPIOs
are not multiplexed. Bits 16:17 are not implemented because the GPIO selection is controlled by
bits 0:1. The REQ/GNT# pairs are enabled/disabled together. For example, if bit 0 is set to 1,
then the REQ/GNT[A]# pair will function as GPIO[0] and GPIO[16].
GP_IO_SEL2
GPO_BLINK
GP_IO_SEL
Mnemonic
GPO_TTL
GP_LVL2
GPI_INV
GP_LVL
—
—
—
—
GPIOBASE + 00h
1A003180h
Yes
GPIO Use Select
GPIO Input/Output Select
Reserved
GPIO Level for Input or Output
Reserved
GPIO TTL Select
GPIO Blink Enable
Reserved
Reserved
GPIO Signal Invert
GPIO Input/Output Select 2
GPIO Level for Input or Output 2
Register Name
Description
Attribute:
Size:
Power Well:
Intel
Table 9-12
R/W
32-bit
Resume
®
82801DB ICH4 Datasheet
0000 FFFFh
1F1F 0000h
1A003180h
00000FFFh
06630000h
00000000h
00000000h
00000000h
00000000h
00000000h
Default
00h
00h
0
shows the GPIO
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO