NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 273

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

7.2.13
Intel
®
Table 7-6. Statistical Counters (Sheet 1 of 2)
82801DB ICH4 Datasheet
Statistical Counters
The ICH4’s integrated LAN controller provides information for network management statistics by
providing on-chip statistical counters that count a variety of events associated with both transmit
and receive. The counters are updated by the LAN controller when it completes the processing of a
frame (that is, when it has completed transmitting a frame on the link or when it has completed
receiving a frame). The Statistical Counters are reported to the software on demand by issuing the
Dump Statistical Counters command or Dump and Reset Statistical Counters command in the SCB
Command Unit Command (CUC) field.
ID
12
16
20
24
28
32
36
40
44
0
4
8
Transmit Good Frames
Transmit Maximum
Collisions (MAXCOL) Errors
Transmit Late Collisions
(LATECOL) Errors
Transmit Underrun Errors
Transmit Lost Carrier Sense
(CRS)
Transmit Deferred
Transmit Single Collisions
Transmit Multiple Collisions
Transmit Total Collisions
Receive Good Frames
Receive CRC Errors
Receive Alignment Errors
Counter
This counter contains the number of frames that were transmitted
properly on the link. It is updated only after the actual transmission
on the link is completed, not when the frame was read from memory
as is done for the Transmit Command Block status.
This counter contains the number of frames that were not transmitted
because they encountered the configured maximum number of
collisions.
This counter contains the number of frames that were not transmitted
since they encountered a collision later than the configured slot time.
A transmit underrun occurs because the system bus cannot keep up
with the transmission. This counter contains the number of frames
that were either not transmitted or retransmitted due to a transmit
DMA underrun. If the LAN controller is configured to retransmit on
underrun, this counter may be updated multiple times for a single
frame.
This counter contains the number of frames that were transmitted by
the LAN controller despite the fact that it detected the deassertion of
CRS during the transmission.
This counter contains the number of frames that were deferred
before transmission due to activity on the link.
This counter contains the number of transmitted frames that
encountered one collision.
This counter contains the number of transmitted frames that
encountered more than one collision.
This counter contains the total number of collisions that were
encountered while attempting to transmit. This count includes late
collisions and frames that encountered MAXCOL.
This counter contains the number of frames that were received
properly from the link. It is updated only after the actual reception
from the link is completed and all the data bytes are stored in
memory.
This counter contains the number of aligned frames discarded
because of a CRC error. This counter is updated, if needed,
regardless of the Receive Unit state. The Receive CRC Errors
counter is mutually exclusive of the Receive Alignment Errors and
Receive Short Frame Errors counters.
This counter contains the number of frames that are both misaligned
(for example, CRS deasserts on a non-octal boundary) and contain a
CRC error. The counter is updated, if needed, regardless of the
Receive Unit state. The Receive Alignment Errors counter is
mutually exclusive of the Receive CRC Errors and Receive Short
Frame Errors counters.
LAN Controller Registers (B1:D8:F0)
Description
273