NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 453

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

13.1.5
13.1.6
13.1.7
13.1.8
Intel
®
82801DB ICH4 Datasheet
REVID—Revision ID Register (SMBUS—D31:F3)
Offset Address:
Default Value:
SCC—Sub Class Code Register (SMBUS—D31:F3)
Address Offset:
Default Value:
BCC—Base Class Code Register (SMBUS—D31:F3)
Address Offset:
Default Value:
SMB_BASE—SMBUS Base Address Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
31:16
Bit
7:0
15:5
Bit
4:1
Bit
7:0
7:0
Bit
0
Revision Identification Value — RO. Refer to the ICH4 Specification Update for the value of the
Revision ID Register.
Reserved — RO
Base Address — R/W. Provides the 32-byte system I/O base address for the ICH4 SMB logic.
Reserved — RO
I/O Space Indicator — RO. This read-only bit is always 1, indicating that the SMB logic is I/O
mapped.
Sub Class Code — RO.
05h = SM Bus serial controller
Base Class Code — RO.
0Ch = Serial controller.
08h
See Bit Description
0Ah
05h
0Bh
0Ch
20–23h
00000001h
Description
Description
Description
Description
Attribute:
Size:
Attributes:
Size:
Attributes:
Size:
Attribute:
Size:
SMBus Controller Registers (D31:F3)
RO
8 bits
RO
8 bits
RO
8 bits
R/W, RO
32-bits
453