NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 255

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

7.1.5
7.1.6
7.1.7
7.1.8
Intel
®
82801DB ICH4 Datasheet
REVID—Revision ID Register (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
NOTE: Refer to the ICH4 specification update for the value of the Revision ID Register.
SCC—Sub-Class Code Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
BCC—Base-Class Code Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
CLS—Cache Line Size Register (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:5
4:3
2:0
Revision Identification Value — RO. This 8-bit value indicates the revision number for the
integrated LAN controller. The three least significant bits in this register may be overridden by the ID
and REV ID fields in the EEPROM.
Sub Class Code — RO . 8-bit value that specifies the sub-class of the device as an Ethernet
controller.
Base Class Code — RO . 8-bit value that specifies the base class of the device as a network
controller.
Reserved
Cache Line Size (CLS) — R/W.
00 = Memory Write and Invalidate (MWI) command will not be used by the integrated LAN controller.
01 = MWI command will be used with Cache Line Size set to 8 DWords (only set if a value of 08h is
10 = MWI command will be used with Cache Line Size set to 16 DWords (only set if a value of 10h is
11 = Invalid. MWI command will not be used.
Reserved
written to this register).
written to this register).
08h
See Note
0Ah
00h
0Bh
02h
0Ch
00h
Description
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
RO
8 bits
RO
8 bits
RO
8 bits
R/W
8 bits
255