FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 228

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
Functional Description
228
Table 5-82. Write Byte/Word Protocol with PEC
Read Byte/Word
Reading data is slightly more complicated than writing data. First the ICH4 must write a command
to the slave device. Then it must follow that command with a repeated start condition to denote a
read from that device's address. The slave then returns 1 or 2 bytes of data. Software must force the
I2C_EN bit to 0 when running this command.
When programmed for the read byte/word command, the Transmit Slave Address and Device
Command Registers are sent. Data is received into the DATA0 on the read byte, and the DAT0 and
DATA1 registers on the read word. The format of the protocol is shown in
Table
20–27
29–36
11–18
2–8
Bit
10
19
28
37
38
1
9
5-84.
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Data Byte - 8 bits
Acknowledge from Slave
PEC
Acknowledge from Slave
Stop
Write Byte Protocol
Description
11–18
20–27
29–36
38–45
2–8
Bit
10
19
28
37
46
47
1
9
Intel
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Data Byte Low - 8 bits
Acknowledge from Slave
Data Byte High - 8 bits
Acknowledge from slave
PEC
Acknowledge from slave
Stop
Write Word Protocol
®
82801DBM ICH4-M Datasheet
Table 5-83
Description
and

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