FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 423

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
11.1.10
11.1.11
11.1.12
Intel
®
82801DBM ICH4-M Datasheet
BASE—Base Address Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
SVID — Subsystem Vendor ID (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
Lockable:
SID — Subsystem ID (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
Lockable:
31:16
15:5
15:0
15:0
Bit
4:1
Bit
Bit
0
Subsystem Vendor ID (SVID) — RO. The SVID register, in combination with the Subsystem ID
(SID) register, enables the operating system (OS) to distinguish subsystems from each other. The
value returned by reads to this register is the same as what was written by BIOS into the IDE_SVID
register.
Subsystem ID (SID) — R/Write-Once. The SID register, in combination with the SVID register,
enables the operating system (OS) to distinguish subsystems from each other. The value returned
by reads to this register is the same as what was written by BIOS into the IDE_SID register.
Reserved
Base Address — R/W. Bits [15:5] correspond to I/O address signals AD [15:5], respectively. This
gives 32 bytes of relocatable I/O space.
Reserved
Resource Type Indicator (RTE) — RO. This bit is hardwired to 1 indicating that the base address
field in this register maps to I/O space
2Ch
00h
No
2Eh
00h
No
20
00000001h
2Fh
2Dh
23h
Description
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
USB UHCI Controllers Registers
R/W, RO
32 bits
RO
16 bits
Core
RO
16 bits
Core
423

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