FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 452
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
Lead Free Status / RoHS Status
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EHCI Controller Registers (D29:F7)
12.1.30
12.1.31
452
ACCESS_CNTL—Access Control Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
HS_Ref_V—USB HS Reference Voltage Register
(USB EHCI—D29:F7)
Offset Address:
Default Value:
Lockable:
31:22
21:16
7:1
15:0
Bit
Bit
Bit
0
2
1
0
Reserved
WRT_RDONLY — R/W.
0 = Disable
1 = Enables a select group of normally read-only registers in the EHC function to be written by
SMI on CF Enable — R/W.
0 = Disable
1 = Enable. When this bit is 1 and SMI on CF is 1, then the host controller will issue an SMI.
SMI on HCHalted Enable — R/W.
0 = Disable
1 = Enable. When this bit is a 1 and SMI on HCHalted is 1, then the host controller will issue an
SMI on HCReset Enable — R/W.
0 = Disable
1 = Enable. When this bit is a 1 and SMI on HCReset is 1, then host controller will issue an SMI—
Reserved— RO.
USB HS Ref Voltage — RW. BIOS should always program this register to the recommended value
of 111111. All other values are reserved
Reserved— RO.
software. Registers that may only be written when this mode is entered are noted in the
summary tables and detailed description as “Read/Write-Special”. The registers fall into two
categories:
- System-configured parameters, and
- Status bits
SMI.
R/W.
00000000h
No
DC–DFh
80h
00h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Power Well:
Intel
R/W
8 bits
®
82801DBM ICH4-M Datasheet
R/W
32 bit
Resume
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