FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 490
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FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
Lead Free Status / RoHS Status
Not Compliant
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AC ’97 Audio Controller Registers (D31:F5)
14.1.1
14.1.2
490
Core Well registers not reset by the D3
Resume Well registers will NOT be reset by the D3
VID—Vendor Identification Register (Audio—D31:F5)
Offset:
Default Value:
Lockable:
DID—Device Identification Register (Audio—D31:F5)
Offset:
Default Value:
Lockable:
•
•
•
•
•
•
•
15:0
15:0
Bit
Bit
offset 2Ch
offset 2Eh
offset 40h: Programmable Codec ID (PCID)
offset 41h: Configuration (CFG)
offset 54h
Bus Mastering Register: Global Status Register, bits 17:16
Bus Mastering Register: SDATA_IN MAP register, bits 7:3
Vendor Identification Value — RO. This is a 16-bit value assigned to Intel.
Device Identification Value — RO.
–
–
–
55h: Power Management Control and Status (PCS)
2Fh: Subsystem ID (SID)
2Dh: Subsystem Vendor ID (SVID)
00
8086h
No
02
24C5h
No
–
–
01h
03h
HOT
to D0 transition:
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
HOT
to D0 transition:
Intel
®
82801DBM ICH4-M Datasheet
RO
16 Bits
Core
RO
16 Bits
Core
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