FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 500

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

AC ’97 Audio Controller Registers (D31:F5)
14.1.23
500
PCS—Power Management Control and Status Register
(Audio—D31:F5)
Address Offset:
Default Value:
Lockable:
14:9
7:2
1:0
Bit
15
8
PME Status (PMES) — RW/C.
0 = Software clears this bit by writing a 1 to it.
1 = This bit is set when the AC ’97 controller would normally assert the PME# signal independent of
Reserved — RO.
PME Enable (PMEE) — R/W.
0 = Disable.
1 = Enable. When set, and if corresponding PMES is also set, the AC'97 controller sets the
Reserved — RO.
Power State — R/W. This field is used both to determine the current power state of the AC ’97 control-
ler and to set a new power state. The values are:
00 = D0 state
01 = not supported
10 = not supported
11 = D3
When in the D3
memory spaces are not. Additionally, interrupts are blocked.
If software attempts to write a value of 10b or 01b in to this field, the write operation must complete
normally; however, the data is discarded and no state change occurs.
the state of the PME_En bit. This bit resides in the resume well.
AC97_STS bit in the GPE0_STS register
HOT
state
54h
0000h
No
HOT
state, the AC ’97 controller’s configuration space is available, but the I/O and
Description
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W, R/WC
16 bits
Resume