MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 1103
MC9S12XDP512MAG
Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDP512MAG.pdf
(1348 pages)
Specifications of MC9S12XDP512MAG
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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26.6.1
Before the MCU can be unsecured in special single chip mode, the EEPROM memory must be erased
using the following method :
After the CCIF flag sets to indicate that the EEPROM mass operation has completed and assuming that the
Flash memory has also been erased, reset the MCU into special single chip mode. The BDM secure ROM
will verify that the Flash and EEPROM memory are erased and will assert the UNSEC bit in the BDM
status register. This BDM action will cause the MCU to override the Flash security state and the MCU will
be unsecured. Once the MCU is unsecured, BDM commands will be enabled and the Flash security byte
may be programmed to the unsecure state.
26.7
26.7.1
On each reset, the EEPROM module executes a reset sequence to hold CPU activity while loading the
EPROT register from the EEPROM memory according to
26.7.2
If a reset occurs while any EEPROM command is in progress, that command will be immediately aborted.
The state of a word being programmed or the sector / block being erased is not guaranteed.
26.8
The EEPROM module can generate an interrupt when all EEPROM command operations have completed,
when the EEPROM address, data, and command buffers are empty.
Freescale Semiconductor
EEPROM address, data, and command buffers empty
All EEPROM commands completed
•
Reset the MCU into special single chip mode, delay while the erase test is performed by the BDM
secure ROM, send BDM commands to disable protection in the EEPROM module, and execute a
mass erase command write sequence to erase the EEPROM memory.
Resets
Interrupts
Unsecuring the MCU in Special Single Chip Mode using BDM
EEPROM Reset Sequence
Reset While EEPROM Command Active
Vector addresses and their relative interrupt priority are determined at the
MCU level.
Interrupt Source
Table 26-11. EEPROM Interrupt Sources
MC9S12XDP512 Data Sheet, Rev. 2.21
NOTE
(ESTAT register)
(ESTAT register)
Interrupt Flag
CBEIF
CCIF
Table
Chapter 26 4 Kbyte EEPROM Module (S12XEETX4KV2)
26-1.
(ECNFG register)
(ECNFG register)
Local Enable
CBEIE
CCIE
Global (CCR) Mask
I Bit
I Bit
1105
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