MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 66

MC9S12XDP512MAG

Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512MAG

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 1 Device Overview MC9S12XD-Family
1.2.4.2
External power and ground for I/O drivers and input to the internal voltage regulator. Because fast signal
transitions place high, short-duration current demands on the power supply, use bypass capacitors with
high-frequency characteristics and place them as close to the MCU as possible. Bypass requirements
depend on how heavily the MCU pins are loaded.
1.2.4.3
Power is supplied to the MCU through V
short-duration current demands on the power supply, use bypass capacitors with high-frequency
characteristics and place them as close to the MCU as possible. This 2.5-V supply is derived from the
internal voltage regulator. There is no static load on those pins allowed. The internal voltage regulator is
turned off, if V
1.2.4.4
V
converters.
1.2.4.5
V
1.2.4.6
Provides operating voltage and ground for the oscillator and the phased-locked loop. This allows the
supply voltage to the oscillator and PLL to be bypassed independently. This 2.5-V voltage is generated by
the internal voltage regulator.
66
DDA
RH
and V
, V
SSA
RL
are the power supply and ground input pins for the voltage regulator and the analog-to-digital
V
and for Internal Voltage Regulator
V
V
V
V
are the reference voltage input pins for the analog-to-digital converter.
REGEN
No load allowed except for bypass capacitors.
No load allowed except for bypass capacitors.
DDR1
DD1
DDA
RH
DDPLL
, V
, V
, V
, V
RL
is tied to ground.
, V
DD2
SSA
DDR2
— ATD Reference Voltage Input Pins
SSPLL
, V
— Power Supply Pins for ATD and V
, V
SS1
— Power Supply Pins for PLL
SSR1
, V
MC9S12XDP512 Data Sheet, Rev. 2.21
SS2
, V
DD
SSR2
— Core Power Pins
and V
NOTE
NOTE
— Power and Ground Pins for I/O Drivers
SS
. Because fast signal transitions place high,
REG
Freescale Semiconductor

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