MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 567

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

14.4.10.1 Low-Voltage Interrupt (LVI)
In FPM, VREG_3V3 monitors the input voltage V
status bit LVDS is set to 1. On the other hand, LVDS is reset to 0 when V
interrupt, indicated by flag LVIF = 1, is triggered by any change of the status bit LVDS if interrupt enable
bit LVIE = 1.
14.4.10.2 Autonomous Periodical Interrupt (API)
As soon as the configured timeout period of the API has elapsed, the APIF bit is set. An interrupt, indicated
by flag APIF = 1, is triggered if interrupt enable bit APIE = 1.
Freescale Semiconductor
On entering the Reduced Power Mode, the LVIF is not cleared by the
VREG_3V3.
Autonomous periodical interrupt (API)
Interrupt Source
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 14-10. Interrupt Vectors
NOTE
DDA
. Whenever V
Local Enable
APIE = 1
Chapter 14 Voltage Regulator (S12VREG3V3V5)
DDA
DDA
drops below level V
rises above level V
LVIA,
LVID
the
. An
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