MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 203
MC9S12XDP512MAG
Manufacturer Part Number
MC9S12XDP512MAG
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDP512MAG.pdf
(1348 pages)
Specifications of MC9S12XDP512MAG
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(24-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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The programmer’s model of the XGATE RISC core is shown in
seven general purpose registers (R1 - R7), which serve as accumulators and index registers. An additional
eighth register (R0) is tied to the value “$0000”. Register R1 has an additional functionality. It is preloaded
with the initial variable pointer of the channel’s service request vector (see
of the remaining general purpose registers is undefined.
The 16 bit program counter allows the addressing of a 64 kbyte address space.
The condition code register contains four bits: the sign bit (S), the zero flag (Z), the overflow flag (V), and
the carry bit (C). The initial content of the condition code register is undefined.
6.4.3
The XGATE’s RISC core is able to access an address space of 64K bytes. The allocation of memory blocks
within this address space is determined on chip level. Refer to the S12X_MMC Section for a detailed
information.
The XGATE vector block assigns a start address and a variable pointer to each XGATE channel. Its
position in the XGATE memory map can be adjusted through the XGVBR register (see
“XGATE Vector Base Address Register
Each vector consists of two 16 bit words. The first contains the start address of the service routine. This
value will be loaded into the program counter before a service routine is executed. The second word is a
pointer to the service routine’s variable space. This value will be loaded into register R1 before a service
routine is executed.
Freescale Semiconductor
XGVBR
+$0000
+$0024
+$0028
+$002C
+$0030
+$01E0
Memory Map
Channel $09 Initial Program Counter
Channel $09 Initial Variable Pointer
Channel $0A Initial Program Counter
Channel $0A Initial Variable Pointer
Channel $0B Initial Program Counter
Channel $0B Initial Variable Pointer
Channel $0C Initial Program Counter
Channel $0C Initial Variable Pointer
Channel $78 Initial Program Counter
Channel $78 Initial Variable Pointer
unused
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 6-20. XGATE Vector Block
(XGVBR)”).
Figure 6-20
Figure
shows the layout of the vector block.
6-19. The processor offers a set of
Variables
Figure
Variables
Code
Code
Chapter 6 XGATE (S12XGATEV2)
6-20). The initial content
Section 6.3.1.3,
203
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