PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 114

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

Configure PCM-side of ELIC:
Write
Write
Write
Write
Write
Configure CFI-side of ELIC:
Write
Write
Write
Write
Write
Write
Reset EPIC-1 Control Memory (CM) to FF
Write
The subscriber’s upstream B
Write
Write
Write
Read
The subscriber’s upstream B
Write
Write
Write
Read
3.8.6.1 EPIC
Write
Initialize EPIC-1 CM:
Write
Semiconductor Group
PMOD = 44
PBNR = FF
POFD = F0
POFU = 18
PCSR = 45
CMD1 = 20
CMD2 = D0
CBNR = FF
CTAR = 02
CBSR = 20
CSCR = 00
MADR = FF
MACR = 70
OMDR = 80
MADR = 89
MAAR = 80
MACR = 71
STAR
MADR = 85
MAAR = 81
MACR = 71
STAR
®
-1 Initialization Example
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PCM-mode 1, single clock rate, PFS evaluated with falling
edge of PDC, R D0 = logical input port 0
512 bits per PCM-frame
the internal PFS marks downstream bit 6, ts 0 (second bit
of frame)
the internal PFS marks upstream bit 6, ts 0 (second bit
of frame)
no clock shift; PCM-data sampled with falling, transmitted
with rising PDC
PDC and PFS used as clock and framing source for the
CFI; CRCL = PDC; CFI-mode 0
FSC shaped for IOM-2 interface; DCL = 2
CFI-data received with falling, transmitted with rising CRCL
256 bits per CFI-frame
PFS is to mark CFI time slot 0
PFS is to mark bit 7 of CFI time slot 0; no shift of
CFI-upstream data relative to CFI-downstream data
2-bit channels located in position 7, 6 on all CFI-ports
set EPIC-1 from CM-reset mode into CM-initialization mode
connection to PCM-port 0, time slot 5
from upstream CFI-port 0, time slot 0
write CM-data adressed by MAAR with content of MADR;
write CM-code addressed by MAAR with '0001'
simple 64-kbit/s connection)
Wait for STAR:MAC = 0
loop to PCM-port 1, time slot 1
from upstream CFI-port 0, time slot 1
write CM-data addressed by MAAR with content of MADR;
write CM-code addressed by MAAR with '0001'
simple 64 kbit/s connection)
Wait for STAR:MAC = 0
1
2
-channel is switched to PCM-port 0, time slot 5
-channel is internally looped via PCM-port 1, time slot 1
114
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Operational Description
data rate;
PEB 20550
PEF 20550
B
B
(code for a
(code for a
01.96