PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 338
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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checked by the ELIC for spikes that may disturb the proper operation of the ELIC. If such
an inappropriate clocking or power failure occurs, data in the internal memories may be
lost, and a reinitialization of the ELIC is necessary. An Initialization Request status bit
(VNSR:IR) can be interrogated periodically by the P to determine the current status of
the device.
In normal chip operation, the IR bit should never be set, not even after power on or when
the clock signals are switched on and off. The IR bit will only be set if spikes ( 10 ns)
are detected on the clock and power lines which may affect the data transfer on the ELIC
internal buses.
5.8.4
Power and Clock Supply Supervision
The + 5 V power supply line (
Semiconductor Group
Power and Clock Supply Supervision/Chip Version
V
DD
) and the reference clock (RCL) are continuously
338
Application Hints
PEB 20550
PEF 20550
01.96
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