PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 315

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PEF20550HV2.1XT

Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF20550HV2.1XT

Lead Free Status / Rohs Status
Compliant
ISTA_E:MFFI interrupt. While the transfer is still in operation (STAR_E = 16
17
Figure 107
Flow Diagram “Transmit + Receive Same Timeslot Command”
The reception of monitor messages may also (if required) be aborted at any time simply
by setting the CMDR_E:MFFR bit while the receive transfer is still in operation.
If more than 16 bytes shall be received, the following procedure can be adopted:
The first 16 data bytes received will be stored in the MFFIFO and acknowledged to the
remote partner. The presence of a 17
Semiconductor Group
th
byte still left unacknowledged, the P can read the first 16 bytes out of the MFFIFO.
P µ
W : CMDR = 01
R : STAR = 05
W : MFFIFO = Data
R : STAR = 04
W : MFSAR = Address
W : CMDR = 08
R : STAR = 12
R : STAR = 13
R : STAR = 01
R : STAR = 10
R : ISTA = 20
R : STAR = 06
R : MFFIFO = Data
R : STAR = 07
MFFR
MFAE,
1
2
N
MFTC1, 0 = 00
MFT1, 0 = 10
MFTO, MFRW,MFFE
MFFE
MFTO
MFFI Interrupt
1
2
M
MFAE, MFRW, MFFE
MFFE
th
315
byte on the receive line will lead to an
EPIC
MFFIFO Reset
MFFIFO Empty
Write Access Enabled
MFFIFO not Empty
Write Access Enabled
MFFIFO not Empty
Access Disabled
Transmit Transfer
in Operation
MFFIFO Empty
Access Disabled
Transfer in Operation
MFFIFO Empty
Access Disabled
No Transfer in Operation
MFFIFO not Empty
Access Disabled
Receive Transfer
in Operation
MFFIFO not Empty
Read Access Enabled
Transfer Completed
MFFIFO Empty
Read Access Enabled
R
ITD08087
Application Hints
PEB 20550
PEF 20550
Da
Ack
Da
Ack
Da
Ack
MR
MR = 1
Da
Ack
Da
Ack
Da
Ack
H
), with the
1
N
1
2
2
M
=
1
N
1
2
2
M
0
01.96

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