PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 127
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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4.3.3
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: F0
P1C3..0
4.4
4.4.1
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 1F
SWT
WTC1..2
Semiconductor Group
bit 7
bit 7
WTC1
1
Port1 Configuration Register (PCON1)
Watchdog Timer
Watchdog Control Register (WTC)
PORT1 Configuration 3…0.
0…port1, pin # is configured as input.
1…port1, pin # is configured as output with push-pull characteristic.
Start Watchdog Timer.
When set, the watchdog timer is started. The only way to disable it, is a ELIC-
reset (power-up or RESEX).
Watchdog Timer Control.
Once the watchdog timer has been started WTC1, WTC2 have to be written
once every 1024 PFS-cycles in the following sequence in order to prevent
the watchdog expiring.
1)
2)
The minimum required interval between the two write accesses is 2 PDC-
periods.
WTC2
1
H
H
WTC1
1
0
SWT
WTC2
1
0
1
1
1
127
P1C3
1
read/write
read
read/write
read
Detailed Register Description
P1C2
1
address: 44
address: 40
address: 88
address: 80
P1C1
1
PEB 20550
PEF 20550
bit 0
bit 0
H
H
H
H
P1C0
1
01.96
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