PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 133
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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OFU9..2
4.6.4
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 00
Semiconductor Group
bit 7
OFU9
PCM-Offset Upstream Register (POFU)
Offset Upstream bit 9…2.
These bits together with PCSR:OFU1..0 determine the offset of the PCM-
frame in upstream direction. The following formulas apply for calculating the
required register value. BNU is the bit number in upstream direction marked
by the rising internal PFS-edge.
PCM-mode 0:
PCM-mode 1,3:
PCM-mode 2:
OFU8
H
OFU7
OFU9..2 = mode
PCSR:OFU1..00 = 0
OFU9..1 = mod
PCSR:OFU0 = 0
OFU9..0 = mod
OFU6
133
OFU5
BPF
BPF
BPF
read/write
read/write
(BNU + 47)
(BNU + 95)
(BNU + 23)
Detailed Register Description
OFU4
address: 13
address: 26
OFU3
PEB 20550
PEF 20550
bit 0
H
H
OFU2
01.96
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