PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 370
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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Since every IOM-2 frame takes 125 s, the formula for the average waiting time is:
t = 125 s
In this formula, the parameter ‘y’ allows for the time it takes subscribers to respond to the
availablilty of the SACCO-A. As exemplified by the basic rate application that follows, the
‘y’ parameter depends on application specific features such as double-last-look logic,
collision detection and interface delays.
S
The following figure shows a typical S
2 HDLC bits are sent in every IOM-2 frame. The average message thus requires
4
Figure 127
Basic Rate Application of ELIC
To derive the response delay ‘y’ of this architecture, note that the double-last-look logic
of the QUAT-S delays recognition of the ‘available’ C/I code by one frame. Another
Semiconductor Group
0
= (m – 1)[265.625 s
Application Example
(
17
/
16
x +
Subscriber 1
Subscriber n
ISAC -S
ISAC -S
33
/
1
8
R
R
/
2
), or (
(m – 1)[(
17
/
4
17
x + 62.5 s
x +
Basic Rate
Subscribers
/
4
S
x +
0
33
/
2
33
) IOM-2 frames for transmission.
®
/
2
) + y]
0
application of the ELIC:
(16.5 + y)]
370
QUAT-S
QUAT-S
IOM -2
CFI Ports
R
Application Notes
ELIC
ITS08107
R
PEB 20550
PEF 20550
01.96
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