OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 20

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
4.5.10 System PLL clock source update enable register
4.5.9 System PLL clock source select register
Table 15.
This register selects the clock source for the system PLL. The SYSPLLCLKUEN register
(see
Remark: When switching clock sources, both clocks must be running before updating the
clock source.
Table 16.
This register updates the clock source of the system PLL with the new input clock after the
SYSPLLCLKSEL register has been written to. In order for the update to take effect, first
write a zero to the SYSPLLUEN register and then write a one to SYSPLLUEN.
Bit
1
2
3
4
31:5
Bit
1:0
31:2
Section
Symbol
EXTRST
WDT
BOD
SYSRST
-
Symbol
SEL
-
bit description
System reset status register (SYSRESSTAT, address 0x4004 8030) bit description
System PLL clock source select register (SYSPLLCLKSEL, address 0x4004 8040)
4.5.10) must be toggled from LOW to HIGH for the update to take effect.
All information provided in this document is subject to legal disclaimers.
Value
0x0
0x1
0x2
0x3
-
Value
0
1
0
1
0
1
0
1
-
Rev. 1 — 15 February 2011
Description
System PLL clock source
IRC oscillator
System oscillator
Reserved
Reserved
Reserved
Description
no RESET event detected
RESET detected
Status of the Watchdog reset
no WDT reset detected
WDT reset detected
Status of the Brown-out detect reset
no BOD reset detected
BOD reset detected
Status of the software system reset.The ARM software
reset has the same effect as the hardware reset using the
RESET pin.
no System reset detected
System reset detected
Reserved
reset status
Chapter 4: LPC122x System control (SYSCON)
UM10441
© NXP B.V. 2011. All rights reserved.
20 of 442
Reset
value
0
0
0
0
0x00
Reset
value
0x00
0x00