OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 438
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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NXP Semiconductors
15.7
Chapter 16: LPC122x Real-Time Clock (RTC)
16.1
16.2
16.3
16.4
16.4.1
16.4.2
16.4.3
16.4.4
Chapter 17: LPC122x Windowed Watchdog Timer (WWDT)
17.1
17.2
17.3
17.4
17.5
17.6
17.7
17.7.1
Chapter 18: LPC122x Comparator
18.1
18.2
18.3
18.4
18.5
18.6
18.6.1
Chapter 19: LPC122x ADC
19.1
19.2
19.3
19.4
19.5
19.6
19.6.1
19.6.2
Chapter 20: LPC122x Flash ISP/IAP
20.1
20.2
20.3
20.4
20.5
20.5.1
20.5.2
20.5.2.1
UM10441
User manual
Example timer calculations . . . . . . . . . . . . . 273
How to read this chapter . . . . . . . . . . . . . . . . 274
Basic configuration . . . . . . . . . . . . . . . . . . . . 274
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
Register description . . . . . . . . . . . . . . . . . . . 275
How to read this chapter . . . . . . . . . . . . . . . . 278
Basic configuration . . . . . . . . . . . . . . . . . . . . 278
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 278
Clocking and power control . . . . . . . . . . . . . 279
Watchdog lock features . . . . . . . . . . . . . . . . 280
Register description . . . . . . . . . . . . . . . . . . . 280
How to read this chapter . . . . . . . . . . . . . . . . 288
Basic configuration . . . . . . . . . . . . . . . . . . . . 288
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 288
General description . . . . . . . . . . . . . . . . . . . . 288
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 289
Register description . . . . . . . . . . . . . . . . . . . 289
How to read this chapter . . . . . . . . . . . . . . . . 295
Basic configuration . . . . . . . . . . . . . . . . . . . . 295
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295
General description . . . . . . . . . . . . . . . . . . . . 295
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 295
Register description . . . . . . . . . . . . . . . . . . . 296
How to read this chapter . . . . . . . . . . . . . . . . 301
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Boot loader . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 302
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
RTC data register . . . . . . . . . . . . . . . . . . . . . 275
RTC . . . . . . . . . . . . . . . . . . . . match register 275
RTC . . . . . . . . . . . . . . . . . . . . . load register 275
RTC control register . . . . . . . . . . . . . . . . . . . 275
Watchdog Mode register. . . . . . . . . . . . . . . . 281
Comparator control register . . . . . . . . . . . . . 289
A/D Control Register. . . . . . . . . . . . . . . . . . . 296
A/D Global Data Register . . . . . . . . . . . . . . . 297
Memory map after any reset. . . . . . . . . . . . . 302
Flash sectors . . . . . . . . . . . . . . . . . . . . . . . . 303
Information block . . . . . . . . . . . . . . . . . . . . . 304
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
16.4.5
16.4.6
16.4.7
16.4.8
16.5
16.5.1
17.7.2
17.7.3
17.7.4
17.7.5
17.7.6
17.7.7
17.8
17.9
18.6.2
18.7
18.7.1
18.7.2
18.7.3
18.7.4
18.7.5
19.6.3
19.6.4
19.6.5
19.6.6
19.7
19.7.1
19.7.2
19.7.3
20.5.2.2
20.5.2.3
20.5.3
20.5.4
20.5.5
20.5.5.1
20.5.5.2
20.5.5.3
20.5.5.4
Functional description . . . . . . . . . . . . . . . . . 277
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . 285
Watchdog timing examples . . . . . . . . . . . . . 286
Functional description . . . . . . . . . . . . . . . . . 292
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
Example (system clock = 30 MHz). . . . . . . . . 273
RTC interrupt control set/clear register . . . . 276
RTC interrupt status register . . . . . . . . . . . . 276
RTC masked interrupt status register . . . . . 276
RTC interrupt clear register . . . . . . . . . . . . . 277
Using the RTC in Deep-sleep or Deep
power-down modes . . . . . . . . . . . . . . . . . . . 277
Watchdog Timer Constant register. . . . . . . . 283
Watchdog Feed register. . . . . . . . . . . . . . . . 283
Watchdog Timer Value register . . . . . . . . . . 284
Watchdog Timer Clock Source Selection
Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
Watchdog Timer Warning Interrupt register
Watchdog Timer Window register . . . . . . . . 285
Voltage ladder register . . . . . . . . . . . . . . . . . 291
Input multiplexer. . . . . . . . . . . . . . . . . . . . . . 292
Reference voltages . . . . . . . . . . . . . . . . . . . 293
Relaxation oscillator. . . . . . . . . . . . . . . . . . . 293
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
Comparator outputs . . . . . . . . . . . . . . . . . . . 294
A/D Interrupt Enable Register . . . . . . . . . . . 298
A/D Data Registers . . . . . . . . . . . . . . . . . . . 298
A/D Status Register . . . . . . . . . . . . . . . . . . . 299
A/D Trim register . . . . . . . . . . . . . . . . . . . . . 299
Hardware-triggered conversion . . . . . . . . . . 300
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
DMA control . . . . . . . . . . . . . . . . . . . . . . . . . 300
Erase operations for the flash block. . . . . . . 304
Write operations for the flash block . . . . . . . 304
Boot process flowchart. . . . . . . . . . . . . . . . . 305
Criterion for Valid User Code . . . . . . . . . . . . 305
Communication protocol . . . . . . . . . . . . . . . 306
ISP command format . . . . . . . . . . . . . . . . . . 306
ISP response format . . . . . . . . . . . . . . . . . . 306
ISP data format . . . . . . . . . . . . . . . . . . . . . . 306
ISP flow control . . . . . . . . . . . . . . . . . . . . . . 307
Chapter 26: Supplementary information
UM10441
© NXP B.V. 2011. All rights reserved.
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