OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 253

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
13.9 Architecture
UM10441
User manual
The block diagram for counter/timer0 and counter/timer1 is shown in
Fig 40. 16-bit counter/timer block diagram
MAT[1:0]
INTERRUPT
CAP[3:0]
STOP ON MATCH
RESET ON MATCH
LOAD[3:0]
All information provided in this document is subject to legal disclaimers.
CAPTURE CONTROL REGISTER
EXTERNAL MATCH REGISTER
MATCH CONTROL REGISTER
INTERRUPT REGISTER
CAPTURE REGISTER 0
CAPTURE REGISTER 1
CAPTURE REGISTER 2
CAPTURE REGISTER 3
TIMER CONTROL REGISTER
MATCH REGISTER 0
MATCH REGISTER 1
MATCH REGISTER 2
MATCH REGISTER 3
Rev. 1 — 15 February 2011
CONTROL
reset
Chapter 13: LPC122x 16-bit Counter/timer 0/1 (CT16B0/1)
enable
CSN
MAXVAL
=
PRESCALE REGISTER
PRESCALE COUNTER
TIMER COUNTER
=
=
Figure
CE
UM10441
TCI
© NXP B.V. 2011. All rights reserved.
=
40.
PCLK
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