OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 252

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
13.8 Example timer operation
UM10441
User manual
Fig 38. A timer cycle in which PR=2, MRx=6, and both interrupt and reset on match are enabled
Fig 39. A timer cycle in which PR=2, MRx=6, and both interrupt and stop on match are enabled
prescale counter
timer counter
(counter enable)
timer counter
prescale
interrupt
counter
counter
PCLK
timer
reset
interrupt
TCR[0]
PCLK
Figure 38
The prescaler is set to 2 and the match register set to 6. At the end of the timer cycle
where the match occurs, the timer count is reset. This gives a full length cycle to the
match value. The interrupt indicating that a match occurred is generated in the next clock
after the timer reached the match value.
Figure 39
prescaler is again set to 2 and the match register set to 6. In the next clock after the timer
reaches the match value, the timer enable bit in TCR is cleared, and the interrupt
indicating that a match occurred is generated.
Fig 37. Sample PWM waveforms with a PWM cycle length of 100 (selected by MR3) and
4
2
4
2
MAT3:0 enabled as PWM outputs by the PWCON register.
shows a timer configured to reset the count and generate an interrupt on match.
shows a timer configured to stop and generate an interrupt on match. The
0
0
PWM2/MAT2
PWM1/MAT1
PWM0/MAT0
All information provided in this document is subject to legal disclaimers.
1
5
1
5
1
Rev. 1 — 15 February 2011
2
2
0
Chapter 13: LPC122x 16-bit Counter/timer 0/1 (CT16B0/1)
0
0
1
6
6
0
41
2
0
65
1
0
2
(counter is reset)
100
0
MR2 = 100
MR1 = 41
MR0 = 65
1
UM10441
© NXP B.V. 2011. All rights reserved.
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