OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 6

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
1.4 Block diagram
UM10441
User manual
Fig 1.
DTR0, DSR0, CTS0,
DCD0, RI0, RTS0
GPIO ports
PIO0/1/2
LPC122x block diagram
4 × MAT
2 × MAT
4 × CAP
2 × CAP
SSEL
MISO
MOSI
SCK
RXD0
RXD1
TXD1
TXD0
SDA
SCL
Grey-shaded blocks represent peripherals with connection to the micro DMA
LPC122x
HIGH-SPEED
32-bit COUNTER/TIMER 0/1
16-bit COUNTER/TIMER 0/1
GPIO
UART0 RS-485
SSP/SPI
I
UART1
2
C-bus
slave
All information provided in this document is subject to legal disclaimers.
CORTEX-M0
TEST/DEBUG
INTERFACE
Rev. 1 — 15 February 2011
ARM
SWD
BRIDGE
AHB TO
AHB-LITE BUS
APB
slave
MICRO DMA
Chapter 1: LPC122x Introductory information
ENGINE
SYSTEM CONTROL
REAL-TIME CLOCK
COMPARATOR0/1
CRC
WINDOWED WDT
POR
IRC
IOCONFIG
10-bit ADC
PMU
slave
slave
slave
XTALOUT
POWER CONTROL,
FLASH 128 kB
GENERATION,
ROM 16 kB
SRAM 8 kB
FUNCTIONS
clocks and
SYSTEM
XTALIN
CLOCK
controls
RESET
UM10441
© NXP B.V. 2011. All rights reserved.
AD[7:0]
ACMP0/1_I[3:0]
ACMP0/1_O
VREF_CMP
CLKOUT
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