OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 38
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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NXP Semiconductors
UM10441
User manual
4.5.36 Start logic reset register 1
Table 43.
Writing a one to a bit in the STARTRSRP1CLR register resets the start logic state. The bit
assignment is identical to
clock edge for registering a start signal. This clock edge (falling or rising) sets the interrupt
for waking up from Deep-sleep mode. Therefore, the start-up logic states must be cleared
before being used.
Table 44.
Bit
10
11
12
13
14
15
16
17
18
31:19 -
Bit
0
1
2
Symbol
RSRI2C
RSRCT16B0
RSRCT16B1
Symbol
ERWDT
ERBOD
-
ERGPIO0
ERGPIO1
ERGPIO2
-
ERDMA
ERRTC
Start logic reset register 1 (STARTRSRP1CLR, address 0x4004 8218) bit
description
Start logic signal enable register 1 (STARTERP1, address 0x4004 8214) bit
description
All information provided in this document is subject to legal disclaimers.
Description
Start signal reset signal for start logic interrupt I2C.
0 = No effect.
1 = Write: reset start signal.
Start signal reset for start logic interrupt CT16B0.
0 = No effect.
1 = Write: reset start signal.
Start signal reset for start logic interrupt CT16B1.
0 = No effect.
1 = Write: reset start signal.
Rev. 1 — 15 February 2011
…continued
Description
Enable start signal for start logic interrupt WDT.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic interrupt BOD.
0 = Disabled.
1 = Enabled.
Reserved.
Enable start signal for start logic interrupt GPIO0.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic interrupt GPIO1.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic interrupt GPIO2.
0 = Disabled.
1 = Enabled.
Reserved.
Enable start signal for start logic interrupt DMA.
0 = Disabled.
1 = Enabled.
Enable start signal for start logic interrupt RTC.
0 = Disabled.
1 = Enabled.
Reserved
Table
42. The start-up logic uses the input signals to generate a
Chapter 4: LPC122x System control (SYSCON)
UM10441
© NXP B.V. 2011. All rights reserved.
38 of 442
Reset
value
0
0
0
0
0
0
0
0
0
-
Reset
value
0
0
0
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